June 2007 |
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| The VSIA Focus on IP | ||||||||
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The VSIA plays a critical role in the development of IP and SoC standards. From Quality to Protection to SoC-related R&D issues, your design will be influenced by these standards. Don't sit back and wait - join VSIA and participate in driving the direction of these standards as have other leading electronics companies. |
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| Expert Viewpoint | ||||||||
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IP Companies should be Looking at the ‘Common Platform’ Business Model 
Jim Lipman (ednjim@earthlink.net) I attended an EDAC-sponsored event at DAC on Sunday night that included head-to-head discussion between two industry panels - one with customers and the other with vendors - moderated by Ron Wilson, executive editor of EDN Magazine and Ed Sperling, editor-in-chief of Electronic News. The co-panels discussed topics of concern gleaned from the DAC attendees. One panel comprised executives from companies designing advanced chips and the other was made up of technical executives from companies in the TSMC design ecosystem - providers of EDA design tools, libraries and IP, and design services. Among the issues the panels covered were architectural design challenges, problems with chip implementation, verification bottlenecks, modeling, and what IP integrators are not getting from IP vendors. A common thread throughout many of the panels' discussion points was a lack of confidence in the IP vendor community. (Read More) How to Establish an Electronics Industry Open Standard 
Gary DelpCTO, VSI Alliance - Previously published in Electronic Business, 4/23/2007 From a user's perspective, eliminating all the risk associated with integrating an IP core onto a piece of silicon is a nice thought, but is just not possible. However, making the right decisions at the beginning of your design can substantially reduce the risk associated with integrating silicon IP into your chip. In addition, there are certain steps that the IP provider can take to reduce their risk as well to protect their investment from theft. As an IP integrator, you incur many risks associated with inserting a third-party IP core into your chip, including incorrect IP functionality, inadequately documented interfaces to the surrounding circuitry, an incorrect version of the IP (poor configuration management), inadequate testability, insufficient verification mechanisms for the integrated IP, and problems using it with your EDA tools. Additionally, problems can occur when the deliverables from the IP provider do not match your expectations - this often indicates a vendor/integrator communications problem. Finally, as a chip developer you need to have a good working knowledge of the requirements (buffering, latency, etc.) of the end system that will use your chip. (Read More) |
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| Events | ||||||||
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Free VSIA Webcast on IP Quality and Integration Listen to the free webcast to learn about what VSIA can do to help you improve the process of selecting and integrating IP cores. During the webcast VSIA discussed the organizations' goals, successes, structure and the issues that VSIA will address in the near future. View the Presentation |
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| Market Your IP Quality | ||||||||
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 VSIA has made publicly available the QIP Metric logos to any company that wants to market its IP Quality status (QIP Metric Adopter, QIP Metric Rated). They are available for free download at
http://vsi.org/pillars/quidelines.htm. |
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| VSIA Press Releases | ||||||||
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June 5, 2007 April 9, 2007 |
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| VSIA in the News | ||||||||
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